1. Field of the Invention
The present invention relates to MOSFET devices and more particularly to MOSFET devices used as low on-impedance switches.
2. Background Information
MOSFET switches are found in many applications and have become common in high frequency switch applications. Known designs have focused on lowering insertion loss and increasing the bandwidth by minimizing the “body effect,” that is inherent in MOSFET structures. Insertion loss can be described, generally, as the loss of signal power delivered to a load due to the addition of a less than perfect switch compared to that if the switch were perfect.
The body effect becomes significant when the FET switch is turned on and neither the source nor the drain are at the same potential as the well. In such instances, the well acts like another gate (sometimes referred to as a “back gate”) and produces a localized increase in the threshold voltage of the device which in turn reduces the conduction from source to drain. That is, the switch on-resistance increases which, in turn, reduces its bandwidth. Bandwidth is defined herein as the −3 dB point on the continuous curve of insertion loss versus frequency.
A representative prior art design focused on reducing the body effect is shown in FIG. 1. This FIG. 1 is found in U.S. Pat. No. 5,818,099 ('099) to Burghartz (as his FIG. 2) illustrating a basic SPST RF (single pole single throw radio frequency) switch. FET1 is the primary switch. A second FET3 shares common gate and source connections with the FET1. The EN signal high turns on both FET1 and FET3, where FET3 connects the well of FET1 to its source. As discussed above, this minimizes the body effect in the '099 switch by keeping the well and source at the same potential. However, note there is no corresponding FET across the drain to the well of FET1. The drain of FET1 may be at different potential due to any drop across FET1.
When EN is false, FET1 is off and its well is driven to ground via FET4. Its drain is driven to ground via FET2. These functions are meant to enhance the off impedance of FET1.
The different handling of the source and drain of FET1 renders FET1 as a one-way, nonsymmetrical switch that is suitable only for passing AC signals. The one-way is also evidenced by the labeling in the '099 of RF IN and RF OUT.
The '099 patent describes an n-type MOSFET structure with a p-well that is isolated from the p-type substrate using n-type well as shown in FIG. 6A of the '099 patent. This type of structure is now commonly used by many makers of such switches, and this same basic structure is used for n-type MOSFET structures in preferred embodiments of the present invention. The '099 patent is hereby incorporated herein by reference.
There are applications where a symmetrical MOSFET switch would be advantageous where signals traveling in either direction would encounter the same switch characteristics. It would also be advantageous to have a switch that may be DC or AC coupled with an improved bandwidth and lowered insertion loss.